Cyclone V FPGA | 2GB DDR3 | SoCKit | ARM Cortex-A9 / FPGA Hybrid System

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FPGA Cyclone V traffic Light FPGA Cyclone V traffic Light
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Speed test on Terasic VEEK-MT-C5SoC Speed test on Terasic VEEK-MT-C5SoC
Testing M9K ram on a Cyclone IV FPGA Testing M9K ram on a Cyclone IV FPGA
OpenGPU on Altera Cyclone V FPGA at Linaro Connect 2017 OpenGPU on Altera Cyclone V FPGA at Linaro Connect 2017
Adaptive Voltage Scaling in ZYNQ FPGAs Adaptive Voltage Scaling in ZYNQ FPGAs
FPGA DDR Game FPGA DDR Game
Mandelbrot Computed by Arm-A9 on Altera DE1-SoC FPGA board, clocked at 800MHz Mandelbrot Computed by Arm-A9 on Altera DE1-SoC FPGA board, clocked at 800MHz